TR EN
EE 426 Heterogeneous Computing and System-on-Chip Design Select Term:
1. Introduction - System-on-Chip (SoC), System-on-System (SoS) 2. SoC communication architectures, IP interfacing, verification, and test 3. Processor Design Approach, Softcore, Hardcore 4. Processor Performance Modeling, System Identification Theory, QEMU Performance, Power Consumption, and Energy Efficiency 5. Pipelining 6. Shared Memory Systems and Coherency, Memory Types, Cache Basics & Hierarchy, Von Neuman Structure, Memory Management, DMA, Unified Memory, HBM, MMIO, Arbiting 7. HW/SW Co-Design, Optimization Basics for Heterogeneous Partitioning Tasks, Partitioning, Scheduling 8. Basics of Chips and Hardware Accelerators, Application-specific Processors, Heterogeneous Platforms 9. Heterogeneity and Accelerators 10. Accelerator-based System Design 11. Accelerator Interface, Hardware Accelerators and Co-Processors 12. On-Chip Interconnection and Network on Chip (NoC) 13. Datacenter Workloads, Novel Storage Devices, 3D integration, Advanced Packaging 14. SoC Application Case Studies
SU Credits : 3.000
ECTS Credit : 6.000
Prerequisite : Undergraduate level EE 310 Minimum Grade of D OR Undergraduate level CS 303 Minimum Grade of D
Corequisite : -
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