Complementary Metal-Oxide Semiconductor (CMOS) technology and limitations; CMOS circuit and logic design; layout rules and techniques; circuit characterization and performance estimation; CMOS subsystem design, basic building blocks; structured design principles; Very-Large-Scale Integrated (VLSI) system design methods; DRC, logic and circuit simulation.
Special Topics in EE: VLSI Systems Design I (EE 58003)
2022 Fall
Faculty of Engineering and Natural Sciences
Electronics Engineering(EE)
3
10.00
İlker Hamzaoğlu -hamzaoglu@sabanciuniv.edu,
English
Doctoral, Master
--
Formal lecture,Interactive lecture,Laboratory
Interactive,Communicative,Project based learning,Task based learning,Simulation
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| Programs\Type | Required | Core Elective | Area Elective |
| MA-European Studies | |||
| MA-European Studies-Non Thesis | |||
| MA-Political Science | |||
| MA-Political Science-Non Thes | |||
| MA-Visual Arts&Vis. Com Des-NT | |||
| MA-Visual Arts&Visual Com Des | |||
| MS-Bio. Sci. & Bioeng. LFI | |||
| MS-Bio. Sci. & Bioeng. LFI-ENG | |||
| MS-Biological Sci&Bioeng. | * | ||
| MS-Computer Sci.&Eng. LFI | |||
| MS-Computer Sci.&Eng. LFI-ENG | |||
| MS-Computer Science and Eng. | * | ||
| MS-Cyber Security(with thesis) | * | ||
| MS-Data Science | |||
| MS-Elec. Eng&Comp Sc.LFI-ENG | |||
| MS-Electronics Eng&Comp Sc.LFI | |||
| MS-Electronics Eng&Computer Sc | * | ||
| MS-Electronics Eng. | * | ||
| MS-Electronics Eng. LFI | |||
| MS-Electronics Eng. LFI-ENG | |||
| MS-Energy Techno.&Man. | * | ||
| MS-Industrial Eng. LFI-ENG | |||
| MS-Industrial Engineering | * | ||
| MS-Industrial Engineering LFI | |||
| MS-Manufacturing Eng-Non Thes | * | ||
| MS-Manufacturing Engineering | * | ||
| MS-Materials Sci & Engineering | * | ||
| MS-Materials Sci. & Eng. LFI | |||
| MS-Materials Sci.&Eng. LFI-ENG | |||
| MS-Mathematics | |||
| MS-Mechatronics | * | ||
| MS-Mechatronics LFI | |||
| MS-Mechatronics LFI-ENG | |||
| MS-Physics | |||
| MS-Physics-Non Thesis | * | ||
| MS-Psychology | |||
| MS-Psychology-Non Thesis | |||
| PHD-Biological Sci&Bioeng. | * | ||
| PHD-Comp. Sci and Eng.after UG | * | ||
| PHD-Computer Science and Eng. | * | ||
| PHD-Cyber Security | * | ||
| PHD-Electronics Eng&ComputerSc | * | ||
| PHD-Electronics Eng. | * | ||
| PHD-Electronics Eng. after UG | * | ||
| PHD-Experimental Psychology | |||
| PHD-Industrial Engineering | * | ||
| PHD-Management | |||
| PHD-Manufacturing Eng after UG | * | ||
| PHD-Manufacturing Engineering | * | ||
| PHD-Materials Sci.&Engineering | * | ||
| PHD-Mathematics | |||
| PHD-Mechatronics | * | ||
| PHD-Mechatronics after UG | * | ||
| PHD-Physics | |||
| PHD-Physics after UG | |||
| PHD-Social Psychology | |||
| PHDBIO after UG | * | ||
| PHDCYSEC after UG | * | ||
| PHDEECS after UG | * | ||
| PHDEPSY after UG | |||
| PHDIE after UG | * | ||
| PHDMAN after UG | |||
| PHDMAN after UG-Finance | |||
| PHDMAN after UG-Man. and Org. | |||
| PHDMAN after UG-Op.&Sup. Cha. | |||
| PHDMAN-Finance Area | |||
| PHDMAN-Man. and Org. Area | |||
| PHDMAN-Op. & Supp. Chain Area | |||
| PHDMAT after UG | * | ||
| PHDMATH after UG | |||
| PHDSPSY after UG |
CONTENT
OBJECTIVE
This course teaches both full custom and standard cell based digital CMOS VLSI circuit design, implementation and analysis. Students gain practical experience by designing, implementing and verifying full custom and standard cell based digital CMOS VLSI circuits.
LEARNING OUTCOME
Describe digital VLSI circuit design styles;
Analyze and reduce delay of full custom digital VLSI circuits;
Design and analyze full custom arithmetic circuits (e.g. adder, multiplier);
Describe basic techniques for reducing power consumption of digital VLSI circuits;
Describe clock generation and distribution in synchronous digital VLSI circuits;
Describe standard cell libraries;
Design and implement standard cell based digital VLSI circuits using logic synthesis and physical synthesis tools;
Verify functionality and timing of standard cell based digital VLSI circuits using a logic simulation tool.
Overview of Analog-to-digital converters and digital-to-analog converters
Update Date:
ASSESSMENT METHODS and CRITERIA
| Percentage (%) | |
| Final | 35 |
| Midterm | 30 |
| Assignment | 35 |
RECOMENDED or REQUIRED READINGS
| Textbook |
Jan M. Rabaey, Anantha P. Chandrakasan, Borivoje Nikolic, Digital Integrated Circuits, Prentice Hall, 2nd Edition |